Quantised LSTMs
Custom precision LSTM support for FPGAs
This project is a development in collaboration with the RAD research team at AMD, Dublin, to develop a generalisable backend and compilation flow to support quantised LSTM layers and their mapping through the FINN framework. The details of the flow and optimisations will be presented at the Field Programmable Logic and Applications Conference (FPL) 2025. Preprints to follow.