Eashan

Eashan Wadhwa is an integrated Master of Enginering (MAI) graduate from Trinity College Dublin and is an engineer at Intel’s VPU team at Ireland. Eashan is simultaneously pursing a part-time PhD degree in RCSL, TCD. His PhD research explores design tool optimisations and extensions for accelerating design turnaround times for system-on-chip style architectures, and aims to jointly optimise application and system architecture during the system design phase.